Procesor sygnałowy 16bit 80MHz 256 kB 30 kB RAM 100 -pinowy TQFP DSPIC33FJ256MC710

dsPIC33F Motor Control Digital Signal Controller (DSC) with seamless migration options to PIC24 MCUs and dsPIC30F DSCs in similar packages.

DC–40 MIPS (40 MIPS @ 3.0-3.6V, -40°C - +85°C)
Industrial temperature range (-40°C - +85°C)
Modified Harvard architecture
16-bit wide data path
24-bit wide instructions
Linear program memory to 4M instruction words
Linear data memory to 64Kb
83 base instructions
16 16-bit General Purpose Registers
2 40-bit accumulators:With rounding, saturation options
Flexible, powerful addressing modes:Indirect, Modulo, Bit-Reversed
16 x 16 fractional/integer multiply operations
32/16 and 16/16 divide operations
Single-cycle multiply and accumulate:- Accumulator write back for DSP operations Dual data fetch
Up to ±16-bit shifts for up to 40-bit dataDirect Memory Access (DMA)
8-channel hardware DMA
2Kb dual ported DMA buffer area (DMA RAM) to store data transferred via DMA
Most peripherals support DMAInterrupt Controller
5-cycle latency